GE ICS-8554D Datasheet Page 2

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01.10GFA-908A
GE Intelligent Platforms Contact Information
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www.ge-ip.com
About GE Intelligent Platforms
GEIntelligentPlatforms,aGeneralElectricCompany(NYSE:GE),isanexperiencedhigh-performance
technologycompanyandaglobalproviderofhardware,software,services,andexpertiseinautomation
andembeddedcomputing.Weofferauniquefoundationofagile,advancedandultra-reliabletechnology
thatprovidescustomersasustainableadvantageintheindustriestheyserve,includingenergy,water,
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isaworldwidecompanyheadquarteredinCharlottesville,VAandispartofGEHomeandBusinessSolutions.
Formoreinformation,visitwww.ge-ip.com.
©2010GEIntelligentPlatforms,Inc.Allrightsreserved.
Allotherbrandsornamesarepropertyoftheirrespectiveholders.
Specificationsaresubjecttochangewithoutnotice.
ICS-8554D Rugged 4-channel, DC-Coupled 105 MHz ADC PMC Module
Block DiagramSpecifications
Processor
• General
- IEEEP1386.1compatiblePCIMezzanineCard
- Linux
®
,Windows
®
andVxWorks
®
software drivers
- 11.8wattstypicalpowerdissipation(dependson
user FPGA contents)
Onboard Resources
• XilinxVirtex-IIFPGA(XC2V3000)
• 2xGC4016DDC(optional)
• 2x256kx36FIFOmemories
I/O Specications
• PCI2.264-bit,66MHzPCIbusinterface
• All64userprogrammableI/OviaPn4connector
routeddirectlytoFPGAasdierentialpairs
• UserdenablesignalinglevelsonPn4
Environmental
• Fivebuildlevelsavailable.airandconduction
cooledversions.
• -40to+85°Coperatingtemperature
• 95%non-condensinghumidity
Ordering Information
ICS-8554D-xOO x:buildlevel(1–5),withGC4016DDCs
ICS-8554D-xO1 x:buildlevel(1–5),withoutGC4016DDCs
DRV-8554-VXW SoftwaredevicedriverforVxWorksoperatingsystem
DRV-8554-LX SoftwaredevicedriverforLinuxoperatingsystem
DRV-8554-WIN SoftwaredevicedriverforWindowsoperatingsystem
DRV-8554-SCA SCA compliant driver
HDK-8554 HardwareDevelopmentKitforFPGAdevelopmentbyuser
PCI 2.2 Interface 64/66
P4 User I/O
128K x 72
FIFO
128K x 72
FIFO
Crystal
Oscillator
User FPGA
Virtex-II
(3 million gates)
Clock Trigger
JTAG
Clock
Control
Sync
2 GC4016 DDCs
(optional)
BIT
+
--
ADC
BIT
+
--
ADC
BIT
+
--
ADC
BIT
+
--
ADC
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